ZTE had 58 patents in future of work during Q4 2023. ZTE Corp filed patents in Q4 2023 for methods and devices related to frequency multiplication signal output with high harmonic suppression, message transmission methods using half-duplex communication, clock synchronization circuits, managing ECUs on vehicles, and adjusting radio frequency power supply. These patents cover a range of technologies aimed at improving signal quality, communication efficiency, synchronization, and power supply management in various devices. GlobalData’s report on ZTE gives a 360-degreee view of the company including its patenting strategy. Buy the report here.
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ZTE grant share with future of work as a theme is 29% in Q4 2023. Grant share is based on the ratio of number of grants to total number of patents.
Recent Patents
Application: Method and device for outputting frequency multiplication signal having high harmonic suppression, and storage medium (Patent ID: US20230412158A1)
The patent filed by ZTE Corp. describes a method and device for outputting a frequency multiplication signal with high harmonic suppression. The method involves obtaining an initial signal, inputting it into a target circuit with a frequency multiplier and a phase adjustment module, adjusting the phase of the second circuit to a target phase, and taking the target signal output as the frequency multiplication signal of the initial signal. The device includes a target circuit with a parallel circuit, a frequency multiplier, and a phase adjustment module, configured to multiply an input initial signal to a frequency multiplication signal with high harmonic suppression.
The method and device utilize a parallel circuit with a frequency multiplier and a phase adjustment module to achieve high harmonic suppression in the output frequency multiplication signal. The phase adjustment module adjusts the phase of the second circuit to a target phase, ensuring a phase difference greater than 90 degrees with the first circuit. Additionally, the device includes a first frequency doubler and a second frequency doubler connected in series to further process the initial signal and output frequency-quadrupled or frequency-doubled signals. The patent also covers a computer-readable storage medium with a program for implementing the method, as well as an electronic apparatus with memory and processor to execute the method.
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