STMicroelectronics has been granted a patent for a flat no-lead semiconductor package featuring a surface-mounted structure. The design includes a recessed member that facilitates coupling to leads, enhancing the mounting process of semiconductor devices on leadframe substrates. GlobalData’s report on STMicroelectronics gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on STMicroelectronics, Quantum dot devices was a key innovation area identified from patents. STMicroelectronics's grant share as of July 2024 was 68%. Grant share is based on the ratio of number of grants to total number of patents.
Flat no-lead semiconductor package with recessed coupling structure
The patent US12074100B2 outlines a method for mounting semiconductor devices onto leadframe substrates, which include a semiconductor die. The process begins with the application of a coupling medium to an exposed lead on the substrate's surface. A semiconductor device is then mounted by attaching its end portion, which features a recessed member designed to accommodate the coupling medium, to the exposed lead. The claims detail various configurations for the recessed member, including step portions and cavity portions, which can enhance the coupling process. The method also specifies that the coupling medium may consist of an electrically conductive adhesive, facilitating effective electrical connections between the semiconductor device and the leadframe.
Further claims elaborate on the structural characteristics of the recessed members, emphasizing dimensions such as height and width relative to the end portion of the semiconductor device. The patent also describes the inclusion of electrical elements within the semiconductor device, such as passive semiconductor elements, and the potential for connection elements to be exposed on the recessed member. Additionally, the method encompasses the application of an encapsulation layer over the semiconductor die and device, ensuring protection and stability. Overall, the claims present a comprehensive approach to improving the mounting and electrical coupling of semiconductor devices, highlighting specific design features that contribute to enhanced performance and reliability in semiconductor packaging.
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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.
