Shenzhen Goodix Technology has patented an electronic circuit for self-diagnosis of data memory (RAM). The circuit utilizes an error correction code unit to generate and verify error codes during data writing, enabling the detection of discrepancies and the provision of a Latent Fault flag for enhanced memory reliability. GlobalData’s report on Shenzhen Goodix Technology gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Shenzhen Goodix Technology, AI-assisted biometric recognition was a key innovation area identified from patents. Shenzhen Goodix Technology's grant share as of June 2024 was 49%. Grant share is based on the ratio of number of grants to total number of patents.
Self-diagnosis electronic circuit for data memory errors
The granted patent US12040032B2 describes an electronic circuit designed for the self-diagnosis of data memory systems. The circuit incorporates a first error correction code unit that generates an error correction code from user data intended for storage in the memory. During the write cycle, both the user data and the corresponding error correction code are written to the memory. An error check unit then calculates a countercheck code from the read user data and compares it with the error correction code retrieved from the memory. If discrepancies arise, the system flags an error, indicating potential malfunctions. Additionally, the circuit is capable of identifying latent faults by comparing the error correction code with the countercheck code during the write cycle.
The patent further details the architecture of the electronic circuit, which includes multiplexers for managing data flow during read and write operations. The error check unit is equipped with mechanisms to generate flags for correctable and uncorrectable errors, as well as to locate faulty bits. The method for self-diagnosis encompasses both write and read cycles, where error correction codes are computed, stored, and verified against countercheck codes. The system is designed to correct single-bit errors while flagging multi-bit errors as uncorrectable. Overall, the invention aims to enhance the reliability of data memory systems by providing robust self-diagnostic capabilities that can detect and address errors effectively.
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