Rapidus and the University of Tokyo are teaming up with Leti, a French research institute, to develop the technology for designing chips using 1-nm range technology, reported Nikkei.
As early as 2024, the partners on the initiative plan to start sharing technology and exchanging staff.
Under the alliance, Leti will leverage its experience with chip components to help create the necessary infrastructure for supplying 1-nm semiconductors.
Japanese semiconductor manufacturer Rapidus is already working with IBM and Imec, a Belgian research and development (R&D) group, to mass produce 2-nm chips in 2027.
According to estimates, 1-nm chips will enter the mainstream market as early as the 2030s.
The power efficiency and computing performance of 1-nm chip is expected to be 10% to 20% higher than that of 2-nm.
How well do you really know your competitors?
Access the most comprehensive Company Profiles on the market, powered by GlobalData. Save hours of research. Gain competitive edge.
Thank you!
Your download email will arrive shortly
Not ready to buy yet? Download a free sample
We are confident about the unique quality of our Company Profiles. However, we want you to make the most beneficial decision for your business, so we offer a free sample that you can download by submitting the below form
By GlobalDataIBM is also considering collaborating on 1-nm chips.
The alliance is expected to create a stable supply chain for the next-generation semiconductors.
In 2022, the Riken Research Institute in Japan teamed together with Rapidus, the University of Tokyo, and other national universities to establish the Leading-Edge Semiconductor Technology Centre (LSTC).
Last month, LSTC reached an agreement with France’s Leti to explore a partnership.
LSTC and Leti aim to establish the fundamental technologies required to develop semiconductors using 1.4-nm-to-1-nm processes.
As part of the partnership, Leti will oversee the partnership’s research on new transistor architectures, with LSTC handling personnel dispatch, prototype testing, and evaluation.
After a certain point, further miniaturisation reduces power efficiency and restricts the potential for performance improvement using standard chip component layouts.
Japan lacks domestic expertise in the design and development of semiconductors in the 1-nm range.
As a result, Rapidus and other Japanese stakeholders hope to import 1-nm design technology and collaborate on research projects to establish partnerships with universities and businesses abroad.
Rapidus was set up last year with support from the Japanese government to boost the local chip industry.
The Japanese government is also providing capital to Rapidus to support R&D initiatives.