Everspin Technologies. has been granted a patent for magnetoresistive device architectures that integrate seamlessly into standard integrated circuit processes. The design allows these devices to fit within existing vertical dimensions, utilizing standard materials and vias for interconnection with surrounding circuitry. GlobalData’s report on Everspin Technologies gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Everspin Technologies, In-memory computing was a key innovation area identified from patents. Everspin Technologies's grant share as of July 2024 was 67%. Grant share is based on the ratio of number of grants to total number of patents.
Magnetoresistive device integration in integrated circuits
The patent US12075630B2 describes an integrated circuit device that incorporates a magnetoresistive device, which is essential for applications in memory and logic functions. The device features a first and second metal layer separated by interlayer dielectric layers, with vias facilitating electrical connections between these layers. The magnetoresistive device includes a top electrode, a bottom electrode, and a magnetoresistive stack that contains a magnetic tunnel junction. Notably, the design allows for the integration of multiple vias, including a first via in the logic portion and a second via in the memory portion, ensuring efficient space utilization within the circuit.
Further claims detail the structural dimensions and relationships between the components. For instance, the height of the magnetoresistive device and associated vias is constrained to fit within the height of the first via, promoting a compact design. The patent also specifies configurations where the magnetoresistive stack's width differs from that of the bottom electrode, enhancing performance characteristics. Additionally, the inclusion of an M-via, which is coaxial with other vias, provides further connectivity options while maintaining a height limitation of 0.1 microns. Overall, the claims emphasize a sophisticated arrangement of layers and components that optimize the functionality and integration of magnetoresistive technology within integrated circuits.
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