Cambricon Technologies has been granted a patent for a fractal calculating device integrated within an integrated circuit. This device features multiple layers of calculation units, including a root unit that issues tasks and middle layers with fractal functional units for sub-tasks, enhancing collaborative computation. GlobalData’s report on Cambricon Technologies gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Cambricon Technologies, User journey analytics was a key innovation area identified from patents. Cambricon Technologies's grant share as of June 2024 was 39%. Grant share is based on the ratio of number of grants to total number of patents.
Fractal calculating device for integrated circuit operations
The patent US12026606B2 describes a fractal calculating device designed to enhance computational efficiency through a multi-layered architecture of calculation units. Each layer consists of functional units capable of performing tasks and storing related data. The device features a root calculation unit at the top layer, which issues tasks, and a middle layer that includes multiple fractal functional units responsible for issuing sub-tasks and processing their results. Additionally, a local functional unit within the middle layer executes local tasks, such as aggregating calculation results. The device also incorporates a leaf calculation unit at the lowest layer, equipped with an accelerator to compute sub-tasks, thereby optimizing performance.
The architecture further includes a controller at each layer, which manages task assignments and instructions. The root controller receives tasks and directs the root functional unit, while the middle layer controller generates fractal and local instructions, splitting tasks into sub-tasks. The leaf layer controller generates fractal instructions for the accelerator to execute. Each layer's controller is also responsible for data management, ensuring that necessary data is transferred from one layer's memory to the next. The patent claims that all calculation units across layers utilize a uniform instruction set architecture, promoting compatibility and integration. The device can be implemented in integrated circuit devices and board cards, indicating its potential for various applications in computing technology.
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