Atomera has been granted a patent for a method of making a radio frequency (RF) semiconductor device. The method involves forming an RF ground plane layer on a semiconductor-on-insulator substrate, including a conductive superlattice. The conductive superlattice consists of stacked groups of layers, with each group containing doped base semiconductor monolayers and at least one non-semiconductor monolayer. The method also includes forming a body, source and drain regions, and a gate. GlobalData’s report on Atomera gives a 360-degree view of the company including its patenting strategy. Buy the report here.
According to GlobalData’s company profile on Atomera, Quantum dot devices was a key innovation area identified from patents. Atomera's grant share as of September 2023 was 51%. Grant share is based on the ratio of number of grants to total number of patents.
Method for making rf semiconductor device with conductive superlattice
A recently granted patent (Publication Number: US11742202B2) describes a method for making a radio frequency (RF) semiconductor device, specifically an RF switch. The method involves several steps, including forming an RF ground plane layer on a semiconductor-on-insulator substrate. This RF ground plane layer is made up of a conductive superlattice, which consists of stacked groups of layers. Each group of layers contains stacked doped base semiconductor monolayers that define a doped base semiconductor portion, along with at least one non-semiconductor monolayer that is constrained within the crystal lattice of the adjacent doped base semiconductor portions.
After forming the RF ground plane layer, a body is formed above it. Spaced apart source and drain regions are then formed adjacent to the body, defining a channel region within the body. Finally, a gate is formed overlying the channel region to control the flow of charge carriers through the channel region in response to an RF switching control signal.
The patent also mentions the formation of a body contact that is coupled to both the body and the RF ground plane layer. This body contact consists of first and second body contact portions located at opposite ends of the channel region. The RF ground plane layer has a thickness ranging from 10 to 50 nm, and the doped base semiconductor portions have a dopant concentration of at least 5×1017 cm-3.
The method described in the patent utilizes a semiconductor-on-insulator (SOI) substrate, specifically a silicon-on-insulator (SOI) substrate. The doped base semiconductor monolayers in the conductive superlattice are made of silicon, while the non-semiconductor monolayers are made of oxygen.
Overall, this patent presents a novel method for manufacturing RF semiconductor devices, particularly RF switches. The use of a conductive superlattice in the RF ground plane layer and the specific configuration of the body contact and gate contribute to the improved performance and functionality of the resulting RF semiconductor device.
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