Indian semiconductor startup Calligo Technologies has secured $1.1m in its pre-Series A funding round to scale its POSIT-based silicon chips designed for high-performance computing (HPC) and AI applications.
The startup intends to use the funds to develop version 2.0 of its silicon chip, expand its engineering team, and form strategic alliances with system integrators, Original Equipment Manufacturers (OEMs), and Original Design Manufacturers (ODMs).
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This funding milestone follows the successful production and deployment of its version 1.0 chip, which was shipped to early customers.
Founded by Anantha Kinnal, Rajaraman Subramanian, and Vinay N Hebbali, Calligo Technologies implements POSIT number systems—a new alternative to traditional floating-point formats—on a RISC-V platform.
The company’s flagship product, the TUNGA accelerator board, incorporates an octa-core POSIT-enabled RISC-V CPU and is compatible with existing x86, ARM, and PowerPC server systems.
The architecture is designed to offer enhanced accuracy, energy efficiency, and dynamic range for compute-intensive tasks, the company claims.
Calligo Technologies co-founder and CEO Anantha Kinnal said: “Insatiable demand for HPC and AI compute has so far been met by adding more hardware. We’re tackling performance inefficiency at the root.
“POSIT enables reduced bit usage without sacrificing accuracy or dynamic range—unlocking tremendous potential for energy savings and scalable computing.”
Seafund general partner Narendra Bhandari said: “Compute requirements are growing exponentially. CalligoTech has already delivered ver1.0 from design to silicon and is rapidly moving toward taping out its next-gen chip. Their innovation is vital for sustainable AI and HPC growth.”
Calligo Technologies has also integrated POSIT functionality into modified RISC-V compilers and frameworks for C/C++, Fortran, and Python, enabling existing HPC and AI applications to operate without any modifications to source code.
With installations in US-based academic and supercomputing institutions and growing interest from the global developer community, the company is said to be preparing for the tape-out of a 64-core POSIT-enabled System-on-Chip, targeted for release within the next 12 to 18 months.
