Atomera. has been granted a patent for a method of manufacturing semiconductor devices. The process involves creating a first single crystal silicon layer, forming a superlattice with stacked silicon monolayers and non-semiconductor layers, and then adding a second single crystal silicon layer with a higher silicon percentage. GlobalData’s report on Atomera gives a 360-degree view of the company including its patenting strategy. Buy the report here.

According to GlobalData’s company profile on Atomera, Quantum dot devices was a key innovation area identified from patents. Atomera's grant share as of June 2024 was 50%. Grant share is based on the ratio of number of grants to total number of patents.

Method for making semiconductor devices with silicon superlattices

Source: United States Patent and Trademark Office (USPTO). Credit: Atomera Inc

The patent US12046470B2 outlines a method for fabricating a semiconductor device that involves the formation of a superlattice adjacent to a first single crystal silicon layer. This first layer contains a specified percentage of silicon-28, which is less than 93%. The superlattice consists of multiple stacked groups of layers, each containing base silicon monolayers and at least one non-semiconductor monolayer, which can include oxygen. A second single crystal silicon layer is then formed adjacent to the superlattice, with a higher silicon-28 percentage, exceeding 95% and potentially reaching over 99%. The method also allows for the inclusion of a third single crystal silicon layer, positioned either between the first layer and the superlattice or between the superlattice and the second layer.

Additionally, the patent describes the potential integration of circuit devices with the second single crystal silicon layer, including quantum bit devices. The process for creating these devices involves establishing spaced source and drain regions that define a channel, along with a gate structure comprising a gate dielectric layer and a gate electrode. The claims emphasize the structural relationships between the layers, including the contact points between the superlattice and the silicon layers, and the varying silicon-28 percentages across the layers, which are critical for the performance and functionality of the resulting semiconductor device.

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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.