Applied Optoelectronics has been granted a patent for a serial peripheral interface circuit. The circuit includes a serial peripheral interface device with various lines, conducting lines, and resistors. The circuit can be calibrated by measuring voltages and replacing resistors based on certain conditions. GlobalData’s report on Applied Optoelectronics gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Applied Optoelectronics, Quantum key distribution was a key innovation area identified from patents. Applied Optoelectronics's grant share as of September 2023 was 63%. Grant share is based on the ratio of number of grants to total number of patents.
Calibration of a serial peripheral interface circuit
A recently granted patent (Publication Number: US11768785B2) describes a serial peripheral interface (SPI) circuit and a calibration method for the circuit. The circuit includes a master device with MISO, MOSI, SCLK, and SS lines, as well as a slave device with corresponding ports connected to conducting lines. The circuit is calibrated by measuring voltages on the MISO and MOSI lines and replacing resistors based on the measured voltages. If the measured voltages are not higher than the high-level input voltage of the respective devices, the first and second resistors are replaced with larger third and fourth resistors, respectively.
The patent also includes additional claims and variations of the SPI circuit. For example, claim 2 specifies that the first and second resistors have two leads connected to the MISO and MOSI lines, respectively. Claim 3 mentions that the first and second resistors can be zero-ohm resistors. Claim 4 introduces the possibility of another SPI device connected to the conducting lines. Claims 5 to 8 describe variations of the circuit with additional conducting lines and a master device connected to them. Claim 9 specifies that the MISO line, first resistor, and first conducting line form a first signal line, while the MOSI line, second resistor, and second conducting line form a second signal line, enabling half-duplex data transmission with another SPI device.
The patent also includes a calibration method for the SPI system. The method involves measuring the voltages on the MISO and MOSI lines and replacing the first and second resistors with larger third and fourth resistors if the measured voltages are not higher than the high-level input voltage of the respective devices.
Overall, this patent describes a serial peripheral interface circuit and a calibration method that allows for efficient and accurate communication between master and slave devices. The calibration process ensures that the circuit operates within the specified voltage levels, enhancing its reliability and performance.
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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.
