Will Semiconductor has been granted a patent for an arithmetic logic unit (ALU) that features a front end latch stage, a Gray code to binary conversion stage, and an adder stage. The design includes multiple latches and multiplexers to efficiently process and generate binary outputs from Gray code inputs. GlobalData’s report on Will Semiconductor gives a 360-degree view of the company including its patenting strategy. Buy the report here.

According to GlobalData’s company profile on Will Semiconductor, Under-screen biometric identification was a key innovation area identified from patents. Will Semiconductor's grant share as of July 2024 was 73%. Grant share is based on the ratio of number of grants to total number of patents.

Arithmetic logic unit (alu) with gray code conversion

Source: United States Patent and Trademark Office (USPTO). Credit: Will Semiconductor Co Ltd

The granted patent US12075179B2 describes an innovative arithmetic logic unit (ALU) designed for use in imaging systems, particularly those involving pixel arrays. The ALU features a front end latch stage that interacts with a Gray code (GC) generator, allowing it to latch GC outputs based on comparator outputs. It includes a signal latch stage, a GC to binary conversion stage, and an adder stage that processes inputs from the GC to binary stage. The architecture also incorporates multiple latch stages for adder inputs and data outputs, enabling efficient data handling and processing. The design emphasizes flexibility, with multiplexers that allow for various input configurations, enhancing the ALU's adaptability in different operational contexts.

Additionally, the patent outlines a sequence of analog-to-digital conversion (ADC) operations that the ALU can perform, which involve latching various signals, including black and left-right signals, at different stages of processing. This sequence is crucial for accurately capturing and processing image data from the pixel array. The imaging system described in the patent integrates multiple ALUs, each connected to a pixel circuit, and includes control circuitry and readout circuits to manage the flow of data. The detailed architecture and operational sequences presented in the patent highlight the ALU's capability to enhance image processing efficiency and accuracy in modern imaging applications.

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