Winbond Electronics has been granted a patent for a memory device featuring multiple memory arrays and blocks. Each block includes source switches that manage voltage levels during programming, applying a reference voltage to selected blocks while floating unselected blocks, enhancing operational efficiency in memory management. GlobalData’s report on Winbond Electronics gives a 360-degree view of the company including its patenting strategy. Buy the report here.
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According to GlobalData’s company profile on Winbond Electronics, Magnetic RAMs was a key innovation area identified from patents. Winbond Electronics's grant share as of June 2024 was 77%. Grant share is based on the ratio of number of grants to total number of patents.
Memory device with source switches for programming memory blocks
The patent US12046288B2 describes a memory device featuring multiple memory arrays, each composed of several memory blocks. Each memory block contains memory cells connected to a common source line, with corresponding source switches that manage the connection to this line. The device includes bit lines linked to groups of memory cells and bit line segmentation circuits that isolate the bit lines of one memory array from another. During programming operations, a selected source switch applies a reference voltage to the common source line of the chosen memory block, while an unselected source switch allows the common source line of the unselected block to float, enhancing operational efficiency.
Additionally, the patent outlines a programming method for the memory device, which involves selecting a memory block for programming and applying a reference voltage to its common source line via the corresponding source switch. The method also includes the application of incremental step pulse voltages to the selected word and bit lines associated with the memory cell being programmed. This structured approach allows for precise control over the programming process, ensuring that the selected memory cell receives the appropriate voltage levels during operation. The memory arrays are specified as NOR arrays, with each memory block formed within a single semiconductor well, optimizing the arrangement and performance of the memory device.
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GlobalData Patent Analytics tracks bibliographic data, legal events data, point in time patent ownerships, and backward and forward citations from global patenting offices. Textual analysis and official patent classifications are used to group patents into key thematic areas and link them to specific companies across the world’s largest industries.
